1. Will work on the following analog IPs but not limit to: ADC/DAC, LDO/DCDC, POR, BOR, Band-gap, various amplifiers, PLL/DLL and high speed interface design
2. Be responsible for schematic capture, simulation, test plan, DK generation and bench verification/characterizations.
3. Escort and instruct layout designers to complete physical implementations
4. Ensure database integrity before any release.
5. Execute any project assignment in the timing manner.
6. Follow company’s quality standards during any project execution.
1. At least 3 or more years of analog circuit design experience with MS in EE or Physics (more senior levels will also be considered)
2. Willing to work as an active team player with group’s goal in mind.
3. Familiar with SPICE simulations including Monte-Carlo analysis
4. Strong knowledge in physical layout and component’s parasitic effects.
5. Knowledge with process and device physics is a plus
6. Acceptable communication skill in written and spoken English
7. Experience in Sigma-Delta ADC/DAC is a plus.